Be responsible for ASIC development section, including modeling, RTL design, block and sub-system level verification for units located in both ASIC and FPGA
Work with people management and competence development
Act as an interface towards stake-holders and vendors
Run recruiting and resource allocation
Bring up continuous improvements and automation
Ensure good collaboration with other units
Contribute and develop our way of working, which is through agile multi-functional teams working in sprints
Set goals, follow-up and strategically evolving section towards vison
Act as the chair and participate in steering groups inside organization or towards external suppliers
Be an active contributor to the Leadership Team of ASIC & FPGA Lund
You will bring
Experience from working as line manager or project manager in R&D organizations
You should preferably have experience of semiconductor business as well as ASIC and/or FPGA development life cycle
Superb communication skills as well as teambuilding, mentoring and cooperation skills
Knowledge regarding cellular radio communication
Experience and interest in agile ways of working and project management