Job Description

description of job

ASIC Design Engineer

Swedium Global is currently looking for a Digital ASIC Designer for our semiconductor client

Start: asap

Location: Ramp-up on-site due to critical set-up, afterwards remote possible

Duration: 6 MM++

Language: English and/or German

Background and Requirements:

  • Background in Electrical Engineering, Computer Science or a comparable education
  • 5 years+ of experience in digital design experience
  • Good knowledge of Verilog, SysVerilog, VHDL (SysVerilog is the preferred language)
  • Proficient experience using simulation of RTL and gate-level, synthesis, equivalence checking CDC
  • Experience as a team leader during the whole development process
  • Working knowledge of C/C++, Python or Perl programming languages
  • Knowledge of Unix/Linux environment and shell programming
  • Experience with industry-standard tools and methodologies

Nice to have:

  • Experience with embedded processors/ firmware development
  • Experience with ISO26262 Functional Safety
  • Knowledege of SysML


  • Be responsible for Digital design (System Verilog / VHDL coding), simulation, synthesis and static timing analysis
  • Define digital algorithms and architecture
  • Implement design-for-test concepts
  • Closely cooperate with analog and digital designers and verification engineers
  • Support hardware post-silicon validation in the lab
  • You work perseveringly on making things better, faster, and more efficient. You are able to quickly establish successful cooperation and communicate openly, clearly, and coherently.
  • Translate design requirements to architecture & following implementation, maintain development activities within the digital domain throughout a project
  • Lead digital designers within a project, provide guidance and support to digital designers
  • Actively push the advancement of methods and tool development
  • Perform analysis and debugging of test results, refinement and documentation of test cases together with the digital verification team (bug reviews)
  • Do scripting and automation
  • Perform design reviews/inspections
  • Demonstrate clear and consistent communication with design, verification, and application teams

If you are interested in this position, please apply online or send your updated CV at

Job Overview

  • Location : Graz, Austria
  • Vacancy : 1
  • Key Skills : ASIC, RTL, Systemverilog