The Semiconductor services of Swedium Global provide design services and solutions in the areas of  FGPA/ASIC Design, Design Verification, UVM,  Gate Level Simulation, Emulation, Formal Verification, DFT, Pre and Post Silicon Validation, AMS Verification and SystemC Modelling.

Our engineers have experience in full chip and module level signoff of static timing analysis,  dynamic and leakage power, formal verification and physical verification,  low power design Implementation.

Our FPGA services include design, prototyping and emulation. We can work on multi FPGA’s, boards, and different vendors and their families including XILINX, ALTERA etc. We have experiences in different interfaces included AXI, AHB, SATA, UART, DDR, MAC, CAN, SPI, I2C etc. We have provided services in different vendor flows, and tools like XILINX Vivado, ISE, Mentor Precision, Cadence Quickturn, Synopsys synplify etc.

We provide services such as  Full Chip/IP/Subsystem Verification Architecture development, Test Bench development, and for different processors. Validation can include parameters like latency, throughput, performance, power-aware functional verification.

We also support Verification Flow and methodology, IP development verification,  verification signoff  including code coverage, functional coverage,  assertions, Gate-level simulation etc.  Our team has technical expertise on different process nodes integrated with technology providers for   28nm, 20nm, 16nm, 10 nm, 7nm.

Swedium Global is capable of providing skilled services both in Front End and Backend DFT.  Our DFT solution provides whole range of DFT flow from definition and architecture to silicon and includes MBIST, regular scan, AC scan, scan compression, boundary-scan (JTAG), power-aware test and ATPG.

In detail, it includes Test Methodology and Flow Development   Scan Compression techniques including Scan, BIST, JTAG structure insertion, special test for complex IOs and IOs, ATPG Flow Development, coverage analysis and enhancement,  pattern simulations,  power Aware Test Implementation and post-silicon support.

The AMS verification skill sets include  Analog/mixed-signal block simulations, Analog and mixed-signal blocks using Verilog-AMS modelling, mixed-signal test bench developments, AMS full-chip verification.